Calculation by counting with decimal-point control apparatus

ABSTRACT

A computer having a plurality of number storage registers. Each register includes a plurality of cold-cathode stepping-tube digit storage stages and one further stage for storing the numerical equivalent of the decimal-point information relating to the number stored in the plurality of stages.

United States Patent Inventors Gerald Offley Crowther Cheam;

George Charles Deli, London; Ara gula Ramachandra Rao, Wallington, England Appl. No. 641,846 Filed May 29, 1967 Patented Apr. 20, 1971 Assignee U.S. Philips Corporation New York, NY. Priority May 31, 1966 Great Britain 2422 1/66 CALCULATION BY COUNTING WITH DECIMAL- POINT CONTROL APPARATUS 7 Claims, 6 Drawing Figs.

US. Cl 235/160 Int. Cl G06f 7/48 Field of Search 235/ 1 60, 176, 156

i DIGITS I [56] References Cited UNITED STATES PATENTS 2,920,826 1/1960 Panner 235/ 1 76 3,358,125 12/1967 Rinaldi 235/160X 3,308,280 3/ 1967 Crowther et al 235/ l 60 3,308,281 3/1967 Crowther et al 235/160 3,280,315 10/1966 Kitz 235/160 3,392,269 7/ 1968 Kitz et a1 235/160X Primary ExaminerMalcolm A. Morrison Assistant Examiner-David H. Malzahn AnorneyFrank R. Trifari ABSTRACT: A computer having a plurality of number storage registers. Each register includes a plurality of coldcathode stepping-tube digit storage stages and one further stage for storing the numerical equivalent of the decimal-point information relating to the number stored in the plurality of stages.

RESET $1 OFF PATENTED APRZO I97! SHEET 1 UFO INVENTORS GERALD O. CROWTHER GEORGE C. DELI Pmmwm ARAGULA R. RAO

l if ENT PATENTEI] APRZO I971 SHEET 2 0F 4 TRANSFER KEYS DISPLAY RESET DIGITS FUNCTION KEYS KZIYS KEYS KEYS INPUT 1 1 1 4 7 o 2 1TO '2 2 2 5 8 X X INPUT To 2 INPUT 3 6 9 FIG. I DP 0 I N VEN TOR.

G. O. CROWTHER BY G. C. DELI RA. RAO

3M AGENT PATENTED APRZOIS?! $575,590

SHEET 3' OF 4 INVENTOREB GERALD o. CROWTHER GEORGE c. DELI ARAGULA R. RAO 5Y2 AGENT PATENTED APR20 I97! SHEET h 0F 4 INVENTOR. G.O. CROWTHER G.C. DELI RA. RAO

mxwfiv; AGENT HDQZ. Pmmmm CALCULATION BY COUNTING WITH DECIMAL-POINT CONTROL APPARATUS This invention relates to a computing machine of the type having electronic stores or registers in which a number can be stored: suitably each register may consist of a chain of coldcathode decade stepping-tubes arranged in cascade of successively higher order stages. Such a computing machine is described in US. Pat. Nos. 3,303,383, 3,303,384, and 3,308,337 and UK. Pat. No. 1,017,407.

In our copendingapplication, now US. Pat. No. 3,308,280 is described an arrangement performing addition. and multiplication processes in a computing machine comprising an electronic register and also an arrangement for storing decimal-point information in such a machine.

The present invention is concerned with an alternative arrangement for storing decimal-point information and with a system of controlling the supply to and extraction from a register of such decimal-point information.

According to the present invention, in a computing machine having a plurality of electronic registers, each comprising a chain of substantially identical digit-storing cold-cathode decade stepping-tube stages, each register comprises stages for storing digits of a multidigit number and also comprises at one end of the chain a decimal-point stage for storing a digit indicating the position of a decimal point.

With such an arrangement all the tubes except one in the chain are arranged to store digits of the numberto be stored whilst the remaining tube stores a digit which indicates the position in the chain at which a decimal point is to be inserted.

Such an arrangement provides a more flexible method of storing decimal-point information and makes unnecessary the provision of a separate and different decimal-point register.

In such a computing machine furnished with an input register together with a keyboard comprising digit keys and a decimal-point key for inserting a number into the input register, the present invention provides a decimal-point control means operative to step the tube in the decimal-point stage one position each time a digit is inserted by the keyboard into the input register and also operative when the decimalpoint key is operated to cause subsequent inhibition of such stepping action. When the insertion of the number is completed and a key indicative of another process is operated this inhibition is removed.

Suitably, the machine comprises an Input Control and an Output Control each operative to receive decimal-point information of a number and to use such inl'onnation to mark the positions at which reading a number into a register and reading a number out of a register respectively are to take place, wherein the decimal-point control means is operative when a number is to be transferred from a first register into a second register to set both Controls to zero and then to insert into the Input Control the decimal-point information in the second register and to insert into the output control the decimal-point information in the first register so as to align the two registers with reference to the decimal points of the two numbers stored therein.

Suitably also, the decimal-point control means is operative during a multiplication process to add the decimal-point digits of two members being multiplied whereby to register a digit which is the sum of the said two digits and which indicates the decimal-point position in the product number, whilst during a division process it is operative to add the decimal-point digit of the dividend to the nines complement of the decimal-point digit of the divisor, and to ignore any tens in the sum, whereby to register a digit which indicates the decimal-point position in the quotient number.

The decimal-point control means may comprise a chain of electronic active elements, such as transistors or electronic tubes, so arranged for supply from a common source of power that no more than one such element is conductive at any one time.

An embodiment of the invention will now be described by way of example with reference to the accompanying diagrammatic drawing in which:

FIG. 1 illustrates a keyboard arrangement,

FIG. 2 is a block diagram illustrating a decimal-point control,

FIG. 3 illustrates a logic arrangement,

FIG. 4 is a circuit diagram pertaining to part of FIG. 2,

FIG. 5 illustrates the arrangement of an Input Control circuit, and

FIG. 6 illustrates part of the decimal-point stage of a register.

FIG. I illustrates the arrangement of one embodiment of a keyboard. The keyboard comprises l0 DIGIT keys numbered one to zeroa DECI'MAL-POINT key DP and three RESET keys one for each of three registers. In this embodiment there will thus be one Input Register and two Accumulator Registers to which information can be transferred automatically in performing certain arithmetical processes. Suitably, provision is also made, by means of TRANSFER keys of which three are shown, for transferring information from one register to another. The keyboard also comprises FUNCTION keys including DIVIDE, MULTIPLY, SUBTRACT and ADD keys indicated in FIG. I by their arithmetical symbols together with two further keys referred to hereinafter as the DIVIDE EQUALS and the MULTIPLY EQUALS keys which are indicated in FIG. I by their arithmetical symbols and which are used at the end of a division or multiplication instruction so as to cause the machine to derive the answer" required.

The computing machine comprises means for displaying the result of a computation and, suitably, each register has a corresponding key on the keyboard for displaying the contents of the register on a common display system; two such DISPLAY keys, one for each Accumulator Register, are illustrated.

The processes of subtraction and addition are performed within the machine immediately the SUBTRACT or ADD key is pressed. Thus for instance let us feed a number x into the Input Register, transfer it to an Accumulator Register, reset the Input Register to zero, and then feed a second number y into the Input Register; pressing the SUBTRACT or the ADD key will now cause the result of the subtraction or addition, that is to say the difference or the sum as the case may be, to appear in the Accumulator Register. When the two numbers have been inserted into their respective registers, upon pressing the SUBTRACT or ADD key the machine has first to align the decimal-point positions in each register and then to perform the necessary addition processes with due reference to the relative positions of the decimal points; such a process is described in more detail in US. Pat. Nos. 3,308,280 and 3,308.28 I.

If desired, the machine can be arranged automatically to clear that is to say reset to zero, a register from which information is being transferred as a result of depressing the appropriate TRANSFER key.

Alternatively, the machine can be arranged to retain the transferred number in the Input Register until a second number y is fed into it from the keyboard, whereupon depression of the first digit key of the number y will clear the input Register before feeding in the digit to that register.

However, the processes of division and multiplication require a further step. As before, let a number x be fed into the Input Register by means of the keyboard, let us depress the MULTIPLY key so preparing the circuit for multiplication and let the number x be still retained in the Input Register. If we now feed in a number y to the keyboard, then each time the DIGIT key is pressed the number x in the Input Register will be multiplied by this digit and, with appropriate shift of position, will be added into the first Accumulator Register. At the end of this process, that is to say when the number y has been inserted into the machine by means of the keyboard, the MULTIPLY EQUALS key is pressed and the product will then appear in the Accumulator Register and with the aid of suitably controlled display system will be indicated by that system.

FIG. 2 illustrates in schematic form the functioning of a decimal-point control system the arrows indicating the paths of signals, in the form of a bias B or a pulse P, from one part of the system to another; FIG. 4 is a circuit diagram illustrating in more detail some of the features of FIG. 2. In these two FIGS. the keys may conveniently be regarded as falling into various groups where depressing any key of the group provides a signal to the remainder of the circuit.

As seen in FIGS. 2 and 4 the ADD, SUBTRACT and DlVlDE keys and the TRANSFER keys, which it will be recalled serve to transfer information from one store to another, comprise a group in that depression of any of these keys causes a pulse to be applied to a stage of a trigger-tube chain described in detail below. Similar pulse or bias functions are provided by the MULTIPLY key and by the other keys on the keyboard described with reference to FIG. I.

The control system is based upon a chain of what might conveniently be termed electronic active elements, that is to say electronic tubes or transistors, which are so arranged for supply from a common source of power that no more than one element can be conductive at any one time. Such chains are of course well known and the requirement of nonsimultaneous conduction of the elements is usually met by providing a common impedance such as a resistor in the supply line to all the elements.

The control system in the embodiment illustrated in FIGS. 2 and 4 includes a chain of cold-cathode trigger-tubes VI to V6 inclusive which are supplied from a 250-volt positive line through a common anode resistor R1 of such value that no more than one tube can be conductive at any one time whilst certain of the tubes in the chain are biased, so as to be operative upon a subsequent change of conditions, by a voltage derived from a preceding tube in the chain: each tube is so connected that it requires both a bias and a pulse input to ignite it.

Consider first of all the stages V4 to V6. Before inserting any information into the Input Register of the machine we can ensure that this register is empty by pressing the RESET INPUT key to clear the register. Now, as will be explained in more detail hereinafter, if there is any information in the Input Register the normal condition for the tubes V4, V5 and V6, which as can be seen from FIG. 2 form a closed loop, is with V6 ignited. When the RESET INPUT key is pressed to reset the Input Register a pulse from the RESET INPUT key will appear at the trigger of V4 and this pulse combined with a positive bias applied through R2 will cause V4, if not already ignited to ignite and thereby apply a positive bias to the trigger of V5.

If we now press a DIGIT key to insert the first digit of a number into the Input Register a train of IO decimal-point" pulses, hereinafter referred to for brevity as DP, pulses will be generated as part of a series of pulse trains which serve to perform the required arithmetical operation. For convenience, it will be assumed that this train of DP pulses occurs during a DP period" which precedes the other pulse trains which perform the computation on the actual digits of the number being handled. The DP pulses are applied from terminal 10P directly to V6 and through an OR gate 0G3 to V5. The first DP pulse will ignite V5, the second DP pulse will extinguish V5 and ignite V6 and V6 will then remain ignited for the remaining eight DP pulses. In the interval between the first and second DP pulses V5 will be ignited and for the duration of this period a bias will be applied through a multiinput OR gate 004 to a gate circuit Gd, not shown in FIG. 4, associated with a decimal-point counting tube which is in the form of an extra stage in the chain of cold-cathode steppingtubes forming the Input Register: the gate circuit Gd is suitably of the same form as gate circuits controlling read-in" operations and carry operations which are associated with each stage in the stepping-tube chain, as set forth in greater detail in the Specifications referred to above.

In a second DIGIT key is now pressed to insert a second digit into the Input Register a pulse will be applied through OR gate 061 to V4 and the presence of a pulse at the input of V4 combined with the presence of a bias from V6 applied through OR gate 062 will ignite V4 causing V6 to extinguish and also causing a bias to be applied to V5. Once again, the first of the pulse trains that are generated by pressing the DIGIT key will be a train of IO DP pulses. The first DP pulse will ignite V5 and the second DP pulse will ignite V6, the process explained above being repeated; each time a further DIGIT key is pressed a bias from V5, equal in duration to the time interval between successive DP pulses, is applied through the OR gate 064 to the decimal-point stepping tube of the Input Register. Each time this bias appears at this stepping tube it allows the decimal-point tube to be stepped one position by a pulse which is coincident with the DP pulses and which appears on the A and B guides of the stepping tubes in the Register. Thus it can be seen that each time a digit is inserted into the keyboard the decimal point is moved along one position.

When the DP key is pressed however this acts upon an inhibiting circuit IG and inhibits the passage of DP pulses through OR gate 0G3 and prevents subsequent ignition of V5 by the depression of further DIGIT keys and V4 remains ignited; no bias will be applied through the multi-input OR gate 0G4 to the decimal-point stepping tube which therefore will not be stepped and will preserve the position of the decimal point indicated by the operation of the DP key.

As depression of the DP key must cause the abovedescribed inhibiting action to operate during subsequent depression of any DIGIT keys it is necessary to cancel this inhibit" state when insertion of the number into the keyboard is complete. The somewhat simplified gating arrangement represented by the inhibiting circuit 1G in this portion of the diagram can therefore be more suitably depicted by the gating arrangement illustrated in FIG. 3 from which it can be seen that in the absence of a signal from the DP key, DP pulses from terminal 10P will be supplied through 0G3 to V5, since in the absence of any signal from the DP key a 1 output appears from OR gate 067 and gate 0G3 remains open.

When the DP key is pressed no output, that is to say an 0 signal, appears at the output of CO7 and at the negated inhibiting input to 063, and DP pulses from terminal 10F are thereafter prevented from being applied to V5. When either the RESET INPUT or the MULTIPLY key is subsequently depressed, which of course only happens after the number has been inserted into the keyboard, a 1 signal is applied through OR gates 0G6 and 007 to 063 and the "inhibit condition is removed.

In a modified arrangement where, as previously mentioned, the number is retained in the Input Register until the first digit of a further number is inserted into the keyboard; the removal of this inhibit condition forms part of the automatically performed operation of clearing the Input Register.

The facility whereby depression of the DP key causes an inhibiting action until released by depression of a further key such for instance as the RESET or MULTIPLY key or a TRANSFER key may be achieved in various ways, three of which will be mentioned by way of example.

In one arrangement which relies on mechanical interlocks, when the DP key is pressed it is held in a depressed condition by a suitable latch mechanism and electrical contacts responsive to the positions of the key maintain an electrical condition which is equivalent to a continued I input to 007. When the RESET or MULTIPLY key is then pressed, a suitable mechanism releases the latch and the DP key is restored to its initial position under spring action, removing the input to the negated input terminal of 067 and opening gate 063. This arrangement can be most readily envisaged by considering the circuit to be electrically that shown in FIG. 2, with the addition of a mechanical linkage between the DP key and the keys-which release the depressed DP key.

In another arrangement which relies upon an electromagnetic lock, when the DP key is pressed it operates electrical contacts which energize an electromagnetic latch to hold the key depressed. Pressing a key such as the MULTIPLY or appropriate RESET key opens the energizing circuit of the latch and again releases the DP key.

In another arrangement OR gate 0G7, FIG. 3, is in the form of a bistable device, such for instance as a cold-cathode trigger-tube or a flip-flop circuit, which can be switched from one stable state to another when the DP key is pressed and switched back again when a key such as the appropriate RESET key is pressed.

It will be course be appreciated that the gate 0G3 in FIG. 3 could be represented as a simple AND gate with ordinary input terminals, the logic of the circuit being the same with either representation; the representation of an OR gate with a negated inhibiting input has been chosen so as more clearly to correspond with the arrangement illustrated in FIG. 2.

When it is desired to transfer information from one registerto another register it is important that the register into which information is to be transferred is first of all inspected to ascertain whether or not it contains any decimal-point information. This may be regarded as inspecting the register to find out whether it is empty or occupied but in this connection it must be remembered that the register will be regarded as occupied if it contains decimal-point information, even if all the digits are in fact set at zero.

Consider first a situation where the register into which information is to be transferred is empty. Pressing any of the keys ADD, SUBTRACT, DIVIDE or any of the TRANSFER keys will cause V1 to ignite so that any other tube in the chain V1 to V6 will extinguish: when V1 ignites it will cause a bias to appear through an OR gate 0G5 at an input of an AND gate AG2 of which a second input is controlled from a bias which indicates the condition of the register into which it is desired to add information. If this register, which is connected to a terminal S1 in FIG. 2, is empty then an appropriate bias voltage will appear at terminal S1 to indicate this: in the embodiment being described this is a negative bias voltage.

At a subsequent period during the process of addition, subtraction, division or transfer, a chain of pulses, which in fact are the DP pulses referred to above, will appear in the machine and these pulses are used to transfer the decimalpoint information. In fact these pulses are merely an extra train of IO counting pulses which are applied to the decimalpoint tubes in exactly the same way as other trains of pulses are applied in turn to each of the stepping tubes of the registers so as to transfer digits from one register to another.

Upon the start of this train of 10 DP pulses the decimalpoint tube in the register from which the number is to be transferred will start to step, one position for each pulse; when, after the occurrence of a number of DP pulses equivalent to the tens complement of the digit stored in the decimal-point stage, the discharge in this tube arrives at the K cathode a pulse will appear at terminal S2 FIG. 2. This pulse will combine in an AND gate AG3 with the bias appearing on terminal S1 and will apply a pulse to an input terminal of a bistable flip-flop FF 1 which will flip" over and apply a bias to AND- gate AG2 the other input of which receives a bias derived from V1. The output of this AND gate AG2 is taken to the multiple-input OR gate 064 and thence to the decimalpoint tube of the register into which information is bein transferred.

It can thus be seen that once the decimal-point tube in the register from which information is being transferred has reached a condition where its discharge is on K then the remaining pulses of the train of 10 DP pulses will be applied to the decimal-point tube of the register into which information is being transferred so that at the end of a train of 10 DP pulses the information in the first register has been transferred to the second register whilst at the same time it has been retained in the first register.

Although this process has been described at some length it is of course almost identical to the processes of reading-in, reading-out and transferring information described in US. Pat. Nos. 3,308,384 and 3,308,280.

Consider now a situation where the register into which information is to be transferred is occupied that is to say already contains information; such a situation will occur, for example, during simple addition. As set forth in US. Pat. No.

3,308,280 it is necessary when such a process is performed to line up the numbers in the two registers so as to ensure that the two numbers are added with correct reference to their respective decimal points, and to this end let there be provided an Input Control in the form for example of a ring counter of 12 cold-cathode trigger-tubes, and an Output Control for example again in the form of a ring counter of l2 cold-cathode trigger-tubes arranged in the same manner as the rings of 10" described in that application. This arrangement is illustrated in simplified form in FIG. 5, which may conveniently be compared with FIG. 3 of US. Pat. No. 3,308,280. The Input Control IC comprises a ring counter of 12 cold-cathode trigger-tubes; each time a DIGIT key of the keyboard is pressed to feed a digit of a number into the Input Register, a pulse is applied along line w to the triggers of all tubes in the ring through respective capacitors C21, each tube being primed through a respective resistor R22 from the cathode of the preceding tube in the ring.

The decimal point store of the Input Register is however formed by a stage in the counting chain that is to say in the register and comprises a counting tube VDP, FIG. 6, which is stepped one position, each time a DIGIT key is pressed, by a gating pulse applied through 064 to the base of Tr2 in the gating circuit Ga. In the embodiment illustrated the tube VDP is located at the end of the stepping-tube chain and is separated from the penultimate tube in that chain by an interstage gating circuit Gd which is the same as those separating adjacent stages in the rest of the chain. Suitable gating circuits are described in detail in the patents referred to above; the process of reading-in information to a selected stage is detailed in US. Pat. No 3,303,384 and as will be appreciated from the description of FIGS. 2 and 4 of the present specification, the application of a bias lasting for the duration between two successive DP pulses to the base of Tr2, FIG. 6, will permit the tube VDP to step one position when the guide A and guide B pulses appear at the common guide lines APL and BPL respectively.

Each register thus stores one or more digits forming a number, plus a digit indicating the decimal-point position.

If the ADD key is pressed the machine switches the Input and Output Controls, as described in US. Pat. No. 3,308,280, so that the Input Control is associated with the register into which information is to be fed that is to say in this example the Accumulator Register, and so that the Output Control becomes associated with the register from which the information is being transferred, in this example the Input Register. However, in the present arrangement this switching is accompanied by an operation which is additional to those described in US. Pat. No. 3,308,280: the Input and Output Controls are reset to zero and then are stepped under control of the Accumulator and Input Registers respectively so as to correspond with the decimal-point information in those registers. This means that the position of the ignited tube in the Input Control now corresponds with the decimal-point information of the Accumulator Register and that the Output Control similarly corresponds with the decimal-point information of the Input Register: however, in a similar manner to the Decimal Point Store described in US. Pat. No. 3,308,280, the Input Control opens a gate associated with a stage at which read-out from the Input Register is to commence.

To illustrate this a simple example will now be given, for simplicity assuming registers capable of handling l0digit numbers. Let the digit position and the decimal-point position in each register be numbered according to the following convention, the digits being indicated by the letter X.

Digit positions D.P. positions Assume that the Accumulator Register contains the number i234. l23400 and that the Input Register contains the number l2.34l20000; thus the digits stored in the registers, including the digits stored by the two decimal-point tubes, can be indicated in the following manner:

Digits D.P.

A.R-.. 1234123400 4 I.R 1234120000 2 Digits D.P. LO. (LO

A.R. i23412340O 4 4 I.R .1234120000 2 2 The machine will now proceed to read out the number in the Input Register and read in" this number into the Accumulator Register by applying successively to each stage in the Input Register a train of 10 pulses so as to step the stage round 10 positions, reading into" the Accumulator Register all pulses after that which transfers the discharge in the Input Register from the K cathode. In other words information will be transferred from the Input Register into the Accumulator Register, digit by digit, starting with the stages marked by the Input and Output Controls. Thus the two numbers are lined up" with reference to their decimal points before addition begins. At the end of the addition process the registers will indicate:

Digits D.P. LC. 0.0

A.R "1246464600 4 4 LR .1234120000 2 2 If the ADD key is pressed again the result will then be- A.R .1258805800 4 4 LR ..1234120000 2 2 The means by which the processes of addition performed will now be considered in rather more detail.

The resetting of the Input and Output Controls by depressions of the ADD key may be accomplished by any of the known methods used to reset a cold-cathode trigger-tube ring counter.

The stepping of the Input Control so that its ignited tube corresponds with the decimal point of the Accumulator Register, .and the corresponding stepping of the Output Control so that its ignited tube corresponds with the decimal point of the Input Register is effected during a period which may conveniently be referred to as the decimal point or DP period which occurs before the read-in" operation described and which is equal in duration to the time occupied by a train of counting pulses. Referring to FIG. 2, if the Accumulator Register is occupied then a positive bias voltage will appear at terminal 81 and this will prevent any operation of AG3 or FFI. After the ADD key is pressed a gating pulse of duration equal to the DP period appears at terminal DPP: this causes gate AGl, which receives the bias from S1 and the gating pulse from DPP, to be opened for the duration of the DP period and therefore 0G4 operates Gd and permits the decimal-point tube in the Accumulator Register to be stepped round 10 positions. The digit stored in this tube thus will be read out" into the Input Control which consequently will be stepped to line up with the decimal-point information in the Accumulator Register. The lining up of the Output Control to correspond with the decimal-point information in the Input Register can be effected in a similar manner.

The process of subtraction can be regarded as addition of nines complements. With numbers in both the Accumulator are Register and the Input Register, depressing the SUBTRACT key will cause the Input Control and the Output Control to reset and then be stepped to accord with the decimal-point information in the Accumulator and Input Registers respectively. The machine will then read in nines complements of the digits in the Input Register and add these complements to the digits in the Accumulator Register by the same process as that described in US. Pat. No. 3,308,281.

The process of multiplication consists of repeated addition so that the operation can be seen to be substantially similar to those already described. Where multiplication is required, instead of a single train of 10 pulses being applied to the pulseinput lines of the counting chain there will be applied a number of trains corresponding to the digit by which it is wished to multiply the digit stored in the Input Register. At each pulse train of 10 pulses a digit of the Input Register will be added into the Accumulator Register by the process described in US. Pat. No. 3,308,280.

The process of multiplication, insofar as it affects the handling of decimal-point information, will now be considered in more detail starting from a condition where the first number x of a desired product x-y is in the Input Register. When the MULTIPLY key is pressed V2, FIGS. 2 and 4, is ignited by a pulse from that key combined with a bias derived from a volt positive source and when ignited applies a positive bias to the trigger of V3. When the first DIGIT key is pressed V3 is ignited by a pulse from that key and applies a bias through 005, FIG. 2, to AG2 thus enabling the decimal-point information to be transferred to the register into which the information is being transferred, that is to say the Accumulator Register. Thus, transfer of decimal-point information occurs immediately when one of the ADD, SUBTRACT, DIVIDE or TRANSFER keys is pressed, but if the MULTIPLY key is pressed then transfer occurs during the DP period when the first DlGIT key is pressed. When the next DIGIT key is pressed V4 ignites and the DP pulses from terminal 10P cause subsequent ignition of V6, in the manner already described, and the shifting one position of the decimal-point tube in the Accumulator Register. When the DP key is pressed this shifting of the decimal-point tube ceases.

To illustrate this process of multiplication a simple example will now be given, using the same conventions as before to illustrate the state of the registers.

To multiply 12.1 by 121 .11:

Digits DP 1 2 1 0 0 0 0 0 0 O 2 IR 0 0 0 0 0 0 0 0 0 0 0 AR Press MULTIPLY key ..0 0 0 0 0 0 0 0 0 0 0 AR Press DIGI'I 1" key DP period. ....0 0 0 0 0 0 0 0 0 0 2 AR Followedby .12 10000000 2 AR Press DIGI'I 2 key DP period 1 2 1 0 0 0 0 0 0 0 3 AR Followedby ..1452000000 3 AR Press DIGIT 1" key DP period ..1 4 5 2 0 0 0 0 0 0 4 AR Followedby .1 464 1 00000 4 AR PressDPkey .1464100000 4 AR Press DIGI'I "1" key .1 4 6 5 3 1 0 0 0 0 4 AR Press DIGIT 1"key ..1 4 6 6 4 3 1 0 0 0 4 AR Press MULTIPLY EQUALS key, which terminates the multiplication process. The final answer, which is displayed by operating the relevant DISPLAY key is thus It can thus be seen that for multiplication the decimal-point information is handled by addition of the two decimal-point digits. In the foregoing example we have the digit 2 representing the decimal point in the number 12.1; after multiplying by the final two digits, that is those succeeding the decimal point, in the number l2l.ll the final decimal-point position is (2+2)=4 which is the digit finally registered in the DP stage.

The preceding description refers to processes where a number in a first register has to be transferred directly into a second register: as has been described such processes occur when adding two numbers or when multiplying a number by a second number. When it is required to perform a division process however it is necessary to be able to add from a first register into a second register, not the number itself but a complement of it: in fact the process of division can be performed by addition of complements, for example nines complements, such as is explained in US. Pat. No. 3,308,281; the operations of the control circuit now to be described are those which provide this facility of adding from a first register to a second register the nines complement of a number in the first register.

Consider first of all the effect of applying to a register containing information, in this case the first register referred to above, a train of 10 DP pulses. As has just been described this will cause the decimal-point tube to step 10 times and finish at the same position as that at which it started, but it will also cause, when the discharge reaches the K cathode, a pulse to appear at this cathode. This pulse, because it marks the position in the train of DP pulses at which cathode K is reached, can be used to mark the end of a counting operation and if we count the number of pulses in the DP pulse train which occur before the appearance of this K, pulse then we will find that this number of pulses is in fact the tens complement of the digit initially stored in the DP stepping tube: by any suitable arrangement which functions to ignore the first of these pulses we can of course arrive at the nines complement of the digit stored in the DP tube. Alternatively if the K cathode is used instead of the K, cathode the nines complement can be derived directly. Such a technique is described in US. Pat. No. 3,308 ,28 I referred to above.

The function of deriving the nines complement is eflected with the aid of two'bistable flip-flops FF2 and FF3 each of which, suitably, comprise a pair of cross-coupled transistors denoted as a and b respectively in FIG. 2. lnitially, both FFZa and FF3a transistors are conducting. When the DlVlDE EQUALS key is pressed a bias is applied from this key to FFZa which is switched off and hence FFZb is switched on. When the train of DP pulses appears at terminal DP the first pulse of the train switches off FF2b hence switching on FF2a which applies a pulse to FF3a; this pulse switches ofi FF3a and hence switches on FF3b. FF3b remains conductive until the appearance at terminal S2 of a K, pulse from the DP tube in the first register, whereupon FF3b is switched off and FF3a is switched on; the two flip-flops are then back in their initial condition with both a transistors conducting. Thus, FF3b has been conductive for a period corresponding to the nines complement of the register content from which the DP information is to be transferred. As this signal from FF3b is only required for the period of division it is applied to an AND gate AG4, see FIG. 2, which also receives for the duration of the division process a bias derived from the depressed DlVlDE EQUALS key. The output of A64 is applied to the multiple-input OR gate 004 which, in a similar manner to that already described, applies a bias to the circuit controlling operation of the decimal-point tube Gd of the register into 1 which information is being transferred.

We thus see that 10 DP pulses are applied to FFZ; the first one is lost by operating FFZ which switches FF3; F1 3 applies to AG4 a bias for a period starting with the second DP pulse and ending with the occurrence of a K pulse in the first register, that is to say for a period corresponding to the nines complement of the digit in the DP tube in the first register. This means that at the output of F1 3 we have a bias which appears for a duration of (1( DP pulses)-(one pulse to switch FF2)(number of pulses after occurrence of K pulse), and this duration is that which would be taken up by a succession of pulses equal in number to the nines complement of the digit stored in the decimal-point tube of the first register.

It can thus be seen that using this technique the decimalpoint information of a number can be handled in the same way as the digit information of the number.

In order to illustrate this technique of manipulating decimal-point information in the same way as digit information, let us divide 144 by 12 with three different decimal-point conditions. We shall assume that,the stores have 12 digital positions, which as will be appreciated from the foregoing exposition means that each store comprises a .Chain of 13 stepping tubes of which 12 store digits of a number and the remaining one stores a digit which represents decimalpoint information. Further, let the first two digital positions in each store be left blank for the insertion of digits of the quotient, as described in US. Pat. No. 3,308,281, so that we can accommodate numbers of up to 10 digits.

We may now number our digit-indicating and decimal-point stages in the following manner, for convenience indicating all digits by the symbol X.

It will be observed that there are two positions corresponding to DP positions 8 and 9; it is a matter of convenience, in any particular case, as to which alternative position the machine is arranged to indicate, and if desired the flexibility of the machine may be increased by providing a control such as a switch by means of which the operator can select the more convenient alternative.

Let us first divide 144 by 1.2, representing the two numbers by digits in the digit-indicating stages and in the decimal-point stage as described previously. Only the first six digits of each register are indicated in the following representations because in these simple examples the remaining six will all be zeros.

Digits D.P. (Dividend) 0 0 1 4 4 0 3 (Divisor) 0 0 1 2 0 0 1 D.P. 0t digidend 3 9s complement of divisor DP 8 Sum 11= 1 Answer== 1 2 0 0 0 0 Divide 144 by 12 1 Digits D.P. (Dividend) 0 0 1 4 4 0 3 (Divisor) 0 0 1 2 0 0 2 D.P. of dividend 3 9s eompiement of divisor DP 7 Sum 1 0= Answer =12= 1 2 0 0 0 0 Divide 14.4 by 12 Digits D.P. (Dividend) 0 0 1 4 4 0 2 (Divisor) 0 0 1 2 0 0 D.P. of dividend =2 9s complement 01 divisor DP =7 Sum =9== 9 Answer=1.2= 1 2 0 0 0 0 9 It will be appreciated that here we are only concerned with indicating the decimal-point position by a single digit so that in our decimal-point arithmetic we disregard the tens" digit: in the above examples, the decade tube in the DP stage will of course read ll as l and 10 as 0.

For division therefore, the decimal-point information is manipulated by adding the decimal-point digit of the dividend to the nines complement of the decimal-point digit of the divisor, any tens" in the sum being ignored.

Although for convenience a fairly simple form of computing machine, for instance of a size appropriate to a desk calculator, has been instanced in the foregoing description it will be appreciated that the examples enunciated can readily require, for instance, trains of more than DP pulses each and the use of two decimal-point stages for each register so as to accommodate decimal-point information expressible by two digits. The exact manner in which such enlargement is effected will depend upon the requirements of any particular case but provided the features of the present invention are fully comprehended should present no difficulty to those skilled in the art.

We claim:

1. A computing machine comprising a plurality of electronic number storage registers each having a chain of substantially identical cold-cathode decade stepping-tube stages, each of said registers including a plurality of digit stages for storing digits of a multidigit number and a decimalpoint stage for storing a digit indicating the position of a decimal point, one of said plurality of registers forming an input register, a keyboard comprising digit keys and a decimal-point key, means including said keyboard for inserting a number into the input register by manipulation of said keys, decimal-point control means connected to said input register for stepping the decimal-point stage one position each time a digit is inserted by the digit keys into the input register, said decimal-point control means inhibiting said stepping action upon operation of the decimal-point key, said decimal-point control means including means for removing said inhibition upon operation of one of a plurality of said further keys initiating another operation, an input control and an output control each operative to receive decimal-point information of a number in each of said controls for marking therein the positions at which the reading of a number into a first register and the reading of a number out of a second register respectively are to take place, means connecting said decimal-point control means to each of said controls whereby the transfer of a number from said first register into said second register resets both of said controls, means for inserting the decimal-point information from said second register into the input control, means for inserting decimalpoint information from said first register into the output control, said first and second registers being thereby aligned with reference to the decimal point of the two numbers stored therein.

2. A computing machine as claimed in claim I, for performing multiplication wherein said decimal-point control means includes means for adding the decimal-point digits of two numbers being multiplied the sum thereof indicating the decimal-point position in the product number and means for registering said sum of the said two digits in the decimal-point stage.

3. A computing machine as claimed in claim 2, for performing division wherein the decimal-point control means includes means for adding the decimal-point digit of the dividend to the nines complement of the decimal-point digit of the divisor, and means for registering, in said decimal-point stage, a digit which indicates the decimal-point position in the quotient number. v

4. A computing machine as claimed in claim 3, wherein the decimal-point control means comprises a chain of alternatively conductive and nonconductive electronic elements, means for supplying said elements from a common source of power whereby no more than one element can be conductive at any one time, said chain including a closed loop comprising a plurality of said elements responsive when a digit key is depressed to conduct successively so as to complete one cycle around the loop, means for completing the cycle when a digit is inserted into the input register by operation of a digit key and thereby applying a pulse from the control stage to the decimal-point stage of the input register, said control means being operative to inhibit the completion of further cycles when the decimal-point key is operated.

5. A computing machine as claimed in claim 4, wherein operation of a key to perform a function requiring transfer of information from one register to another causes conduction of an active element outside the said closed loop, means connected to said active element through said decimal-point control means for opening the register into which information is to be transferred to receipt of infonnation from the other register, and means for aligning the two registers with reference to their respective decimal-point information.

6. A computing machine as claimed in claim 5, including an accumulator means for multiplying a number in the input register by repeated transfer of the number to said accumulator register, said decimal-point control means responsive to activation of a Multiply key on the keyboard to align the two registers, said control means further including means to cause conduction in the closed loop so that each subsequent depression of a digit key to multiply the number in the input register causes a cycle around the loop until inhibited by operation of the decimal-point key.

7. A computing machine as claimed in claim 6, wherein the electronic active elements are cold-cathode trigger tubes. 

1. A computing machine comprising a plurality of electronic number storage registers each having a chain of substantially identical cold-cathode decade stepping-tube stages, each of said registers including a plurality of digit stages for storing digits of a multidigit number and a decimal-point stage for storing a digit indicating the position of a decimal point, one of said plurality of registers forming an input register, a keyboard comprising digit keys and a decimal-point key, means including said keyboard for inserting a number into the input register by manipulation of said keys, decimal-point control means connected to said input register for stepping the decimalpoint stage one position each time a digit is inserted by the digit keys into the input register, said decimal-point control means inhibiting said stepping action upon operation of the decimal-point key, said decimal-point control means including means for removing said inhibition upon operation of one of a plurality of said further keys initiating another operation, an input control and an output control each operative to receive decimal-point information of a number in each of said controls for marking therein the positions at which the reading of a number into a first register and the reading of a number out of a second register respectively are to take place, means connecting said decimal-point control means to each of said controls whereby the transfer of a number from said first register into said second register resets both of said controls, means for inserting the decimal-point information from said second register into the input control, means for inserting decimal-point information from said first register into the output control, said first and second registers being thereby aligned with reference to the decimal point of the two numbers stored therein.
 2. A computing machine as claimed in claim 1, for performing multiplication wherein said decimal-point control means includes means for adding the decimal-point digits of two numbers being multiplied the sum thereof indicating the decimal-point position in the product number and means for registering said sum of the said two digits in the decimal-point stage.
 3. A computing machine as claimed in claim 2, for performing division wherein the decimal-point control means includes means for adding the decimal-point digit of the dividend to the nines complement of the decimal-point digit of the divisor, and means for registering, in said decimal-point stage, a digit which indicates the decimal-point position in the quotient number.
 4. A computing machine as claimed in claim 3, wherein the decimal-point control means comprises a chain of alternatively conductive and nonconductive electronic elements, means for supplying said elements from a common source of power whereby no more than one element can be conductive at any one time, said chain including a closed loop comprising a plurality of said elements responSive when a digit key is depressed to conduct successively so as to complete one cycle around the loop, means for completing the cycle when a digit is inserted into the input register by operation of a digit key and thereby applying a pulse from the control stage to the decimal-point stage of the input register, said control means being operative to inhibit the completion of further cycles when the decimal-point key is operated.
 5. A computing machine as claimed in claim 4, wherein operation of a key to perform a function requiring transfer of information from one register to another causes conduction of an active element outside the said closed loop, means connected to said active element through said decimal-point control means for opening the register into which information is to be transferred to receipt of information from the other register, and means for aligning the two registers with reference to their respective decimal-point information.
 6. A computing machine as claimed in claim 5, including an accumulator means for multiplying a number in the input register by repeated transfer of the number to said accumulator register, said decimal-point control means responsive to activation of a ''Multiply'' key on the keyboard to align the two registers, said control means further including means to cause conduction in the closed loop so that each subsequent depression of a digit key to multiply the number in the input register causes a cycle around the loop until inhibited by operation of the decimal-point key.
 7. A computing machine as claimed in claim 6, wherein the electronic active elements are cold-cathode trigger tubes. 